MP3 working principle
MP3 working principle
MP3 player uses digital signal processor DSP (Digital Sign Processer) to complete the processing, transmission and decoding of MP3 files. of the task. DSP is in charge of the Walkman's data transmission, device interface control, file decoding and playback and other activities. DSP can complete a variety of processing tasks in a very short time, and this process consumes very little energy (this is also a significant feature of it being suitable for portable players).
A complete MP3 player is divided into several parts: central processing unit, decoder, storage device, host communication port, audio DAC and power amplifier, display interface and control keys. The central processing unit and decoder are the core of the entire system. The central processing unit here is usually called MCU (single-chip microprocessor), or microcontroller for short. It runs the entire MP3 control program, also called fireware (or firmware program). Control the work of each component of MP3: read data from the storage device and send it to the decoder for decoding; complete data exchange with the host when connected to the host; receive control button operations, display system operating status and other tasks. The decoder is a hardware module in the chip, or hardware decoding (some MP3 players use software decoding, which is completed by a high-speed central processor). It can directly complete the decoding operation of MP3 data streams in various formats and output digital audio signals in PCM or I2S format.
Storage devices are an important part of MP3 players. Usually MP3 players use semiconductor memory (FLASH MEMORY) or hard disk (HDD) as storage devices. It accepts data from the communication port of the storage host (usually in the form of files). During playback, the MCU reads the data in the memory and sends it to the decoder. The storage of data must have a certain format. As we all know, PC manages disk data in the form of files, and MP3 is no exception. The most common method is to directly use the PC's file system to manage the memory. The Microsoft operating system uses the FAT file system. , which is also the most widely used one. One of the tasks of the player is to implement the FAT file system, that is, it can access and read the data from the FAT file system disk by file name.
The host communication port is the way for the MP3 player and PC to exchange data. The PC uses this port to operate the data in the MP3 player's storage device, copy, delete, duplicate files and other operations. At present, the most widely used one is the USB bus, and it follows the large-capacity mobile storage protocol specification defined by Microsoft, and uses the MP3 player as a mobile storage device of the host. Several specifications need to be followed here: USB communication protocol, large-capacity mobile storage specification and SCSI protocol.
The audio DAC converts digital audio signals into analog audio signals to drive analog audio equipment such as headphones and power amplifiers. Here we will introduce digital audio signals. Digital audio signals are relative to analog audio signals. We know that the essence of sound is waves. People say that the frequency of sound that can be heard is between 20Hz and 20kHz, which is called sound wave. The representation of waves by analog signals is continuous functional characteristics. The basic principle is that waves of different frequencies and amplitudes are superimposed. The digital audio signal is a quantization of the analog signal. The typical method is to sample the time coordinates at equal time intervals and quantize the amplitude. The number of samples per unit time is called the sampling frequency. In this way, a section of sound wave can be digitized and turned into a series of values. Each value corresponds to the amplitude value of the corresponding sampling point. Arranging these numbers in order becomes a digital audio signal. This is the ADC (analog-to-digital conversion) process. The DAC (digital-to-analog conversion) process is the opposite, converting continuous numbers into corresponding voltages in sequence at the frequency of sampling. The information decoded by the MP3 decoder is a digital audio signal (digital audio signals have different formats, the most commonly used are PCM and I2S). It needs to be converted into an analog signal through a DAC converter to drive the power amplifier and be recognized by the human ear.
The display device of MP3 players usually uses LCD or OLED to display the working status of the system. Control keyboards are usually push button switches. The keyboard and display device together form the human-computer interaction interface of the MP3 player.
The software structure of the MP3 player corresponds to the hardware, that is, each hardware part has a corresponding software code. This is because most of the hardware parts are digitally programmable.
To summarize, the most simplified working principle of MP3 can be summarized as follows: First, take the MP3 song file out of the memory and read the signal on the memory → go to the decoding chip to decode the signal → through digital and analog The converter converts the decoded digital signal into an analog signal → then amplifies the converted analog audio → low-pass filters it and sends it to the headphone output port. After output, it is the music we hear.
Global flash memory technology is mainly controlled by AMD, ATMEL, Fujistu, Hitachi, Hyundai, Intel, Micron, Mitsubishi, Samsung, SST, SHARP, and TOSHIBA. Due to the differences in their respective technical architectures, they are divided into several categories. Big camp.
1. NOR technology
NOR
NOR technology (also known as Linear technology) flash memory is the earliest Flash Memory and is still the majority supplier. Technical architecture supported by vendors. It is derived from traditional EPROM devices. Compared with other Flash Memory technologies, it has the advantages of high reliability and fast random reading speed. In situations where erasing and programming operations are less and code is directly executed, especially pure code storage It is widely used in applications such as PC BIOS firmware, mobile phones, hard drive control memory, etc.
NOR technology Flash Memory has the following characteristics: (1) Programs and data can be stored on the same chip, with independent data bus and address bus, which can be read randomly and quickly, allowing the system to read directly from Flash Get the code for execution without first downloading the code to RAM and then executing it; (2) Single-byte or single-word programming is possible, but single-byte erasing is not possible. The erasing operation must be performed in blocks or on the entire chip. Reprogramming of memory requires preprogramming and erasing of blocks or entire slices. Because the erasing and programming speed of NOR technology Flash Memory is slow and the block size is large, erasing and programming operations take a long time. In applications of pure data storage and file storage, NOR technology is insufficient. However, there are still supporters who continue to be optimistic about this technology in write-oriented applications such as CompactFlash cards.
The latest member of Intel's StrataFlash family - 28F128J3, is the flash memory device with the largest storage capacity produced using NOR technology so far, reaching 128Mb (bit). For applications that require programs and data to be stored in Mainstream applications in the same chip are a more ideal choice. The chip uses a 0.25μm manufacturing process and uses MLC technology that supports high storage capacity and low cost. The so-called MLC technology (multi-level cell technology) refers to charging the polysilicon floating gate to different levels to correspond to different threshold voltages, representing different data. There are 4 threshold voltages (00/ 01/10/11), so 2b of information can be stored; in traditional technology, each memory cell has only 2 threshold voltages (0/1) and can only store 1b of information. Providing double storage capacity in the same space comes at the expense of reduced write performance. Intel uses a software method called VFM (Virtual Small Block File Manager) to manage and operate large storage blocks as small sectors, which improves write performance to a certain extent and can also be applied to data storage.
DINOR
DINOR (Divided bit-line NOR) technology is a patented technology developed by Mitsubishi and Hitachi, which to a certain extent improves the shortcomings of NOR technology in write performance. DINOR technology Flash Memory has the same fast random read function as NOR technology. The byte random programming speed is slightly lower than NOR, and the block erase speed is faster than NOR. This is because when NOR technology Flash Memory is programmed, the charge inside the memory cell moves to the floating gate of the transistor array, and the charge accumulates, causing the potential to change from 1 to 0; when erasing, the charge accumulated on the floating gate is removed. Change the potential from 0 to 1. The direction of charge movement in DINOR technology Flash Memory is opposite to the former during programming and erasing operations. DINOR technology Flash Memory does not need to pre-program the page when performing an erase operation, and the voltage required for the programming operation is lower than the voltage required for the erase operation, which is contrary to NOR technology.
Although DINOR technology has advantages over NOR technology, due to limitations of its own technology and processes, it still does not have the capabilities and development capabilities in the current flash memory market. After decades of development, technology and processes are becoming increasingly sophisticated. The ability to compete with mature NOR technology. At present, the maximum capacity of DINOR technology Flash Memory reaches 64Mb. The DINOR technology device launched by Mitsubishi - M5M29GB/T320, uses Mitsubishi and Hitachi's patented BGO technology to divide the flash memory into four storage areas. While programming or erasing operations are performed on any one of the storage areas, Perform a read operation on one of the other three storage areas, and use hardware to implement programming and erasing operations at the same time as the read operation without the need for an external EEPROM. System speed is increased due to multiple access channels. The chip uses a 0.25μm manufacturing process, not only has a fast reading speed of 80ns, but also has advanced power-saving performance. In standby and automatic power-saving mode, the power consumption is only 0~33μW. When any address line or chip enable signal remains unchanged for 200ns, it enters automatic power-saving mode. It can be used in applications that have strict power consumption restrictions and fast reading requirements, such as digital cellular phones, car navigation and global positioning systems, handheld computers and set-top boxes, portable computers, personal digital assistants, wireless communications, etc. .
2. NAND technology
NAND
Samsung, Toshiba and Fujitsu support NAND technology Flash Memory. Flash memory with this structure is suitable for pure data storage and file storage. It is mainly used as a storage medium for SmartMedia cards, CompactFlash cards, PCMCIA ATA cards, and solid-state disks, and is becoming the core of flash disk technology.
NAND technology Flash Memory has the following characteristics: (1) Read and program operations are performed in page units, 1 page is 256 or 512B (bytes); erase operations are performed in block units, 1 block be 4K, 8K or 16KB. It has the functions of fast programming and fast erasing, and its block erasing time is 2ms; while the block erasing time of NOR technology reaches several hundred ms. (2) Data and address use the same bus to achieve serial reading. Random reads are slow and cannot be randomly programmed byte by byte. (3) The chip size is small and there are few pins. It is the solid-state memory with the lowest bit cost and will soon break through the price limit of US$1 per megabyte. (4) The chip contains failed blocks, the number of which can reach a maximum of 3 to 35 blocks (depending on the memory density). Invalid blocks will not affect the performance of valid blocks, but the designer needs to mask the invalid blocks in the address mapping table. Samsung developed the world's first 1Gb NAND technology flash memory at the end of 1999. It is said that this Flash Memory can store 560 high-resolution photos or 32 CD-quality songs, and will become an ideal medium for the next generation of portable information products. Samsung has adopted many DRAM process technologies, including using a 0.15μm manufacturing process for the first time to produce this Flash. The K9K1208UOM, which has been mass-produced, uses a 0.18μm process and has a storage capacity of 512Mb.
UltraNAND
The UltraNAND technology jointly launched by AMD and Fujitsu*** is called advanced NAND flash memory technology. It is compatible with the NAND standard: it has a higher level of reliability than NAND technology; it can be used to store code, thus demonstrating the cost advantage of NAND technology in code storage applications for the first time; it has no failed blocks, so no system-level checks are needed Error and correction functions enable more efficient use of memory capacity.
Like DINOR technology, despite the advantages of UltraNAND technology, NAND technology is still the mainstream in the current market. The first member of the UltraNAND family is AM30LV0064, which uses a 0.25μm manufacturing process and has no failed blocks. It can achieve error-free operation in at least 104 erase and write cycles. It is suitable for applications requiring high reliability, such as telecommunications and network systems. Personal digital assistants, solid-state drives, and more. The capacity of AM30LV0128 under development reaches 128Mb, and UltraNAND technology Flas in AMD's plan
3. AND technology
AND technology is Hitachi's patented technology. Hitachi and Mitsubishi both support Flash Memory with AND technology. AND technology, like NAND, uses the concept of "mostly intact memory" and is currently another important flash storage technology in the field of data and document storage.
Hitachi and Mitsubishi companies use 0.18μm manufacturing process and combine it with MLC technology to produce 512Mb-AND Flash Memory with smaller chip size, larger storage capacity and lower power consumption, and then use double density The packaging technology DDP (Double Density Package Technology) superimposes two 512Mb chips in a TSOP48 package to form a 1Gb chip. HN29V51211T has outstanding low power consumption characteristics, with a read current of 2mA and a standby current of only 1μA. At the same time, due to the internal RAM buffer consistent with the block size, the AND technology is not as written as other flash memory technologies using MLC. Input performance is seriously degraded. Hitachi uses this chip to manufacture 128MB MultiMedia cards and 2MB PC-ATA cards for smart phones, personal digital assistants, handheld computers, digital cameras, camcorders, portable music players, etc.
4. Flash memory derived from EEPROM
EEPROM is highly flexible and can be read and written in single bytes (no erasing is required, data can be rewritten directly), but The storage density is small and the unit cost is high. Some manufacturers produce another type of Flash Memory that uses EEPROM as a flash storage array, such as ATMEL and SST's small sector flash memory (Small Sector Flash Memory) and ATMEL's mass memory (Data-Flash Memory).
This type of device has the performance characteristics of a compromise between EEPROM and NOR technology Flash Memory: (1) The flexibility of reading and writing is inferior to EEPROM, and data cannot be directly rewritten. Page erasing is required before programming, but compared with the block structure of NOR technology Flash Memory, its page size is small, and it has the characteristics of fast random reading, fast programming, and fast erasing. (2) Compared with EEPROM, it has obvious cost advantages. (3) The storage density is higher than EEPROM, but smaller than NOR technology Flash Memory. For example, the storage density of Small Sector Flash Memory can reach 4Mb, and trial samples of 32Mb DataFlash Memory chips are available. Precisely because of the performance flexibility and cost advantages of this type of device, it still has a place in today's flash memory market.
Small Sector Flash Memory uses a parallel data bus and page structure (1 page is 128 or 256B) to perform read and write operations on pages, so it has the advantages of fast random reading of NOR technology without its programming and erase function defects, suitable for code storage and small-capacity data storage, and is widely used to replace EPROM.
DataFlash Memory is ATMEL's patented product. It uses SPI serial interface and can only read data sequentially, but it is helpful to reduce costs, increase system reliability, and reduce package size. The main storage area adopts page structure. There are 2 SRAM data buffers consistent with the page size between the main storage area and the serial interface. The special structure determines that it has multiple reading and writing channels: it can read directly from the main storage area, or read from or write to the main storage area through the buffer. The two buffers can read or write to each other. The main storage area can also use buffers for data comparison. Suitable for data or file storage applications such as answering machines, pagers, digital cameras, etc. that can accept serial interfaces and slower read speeds. Memory will break through the price limit of $1 per megabyte, further demonstrating its price advantage over NOR technology.
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